So, I just got my hands on a couple of MAX2832s (http://www.maxim-ic.com/datasheet/index.mvp/id/5160) and MAX2837s (http://www.maxim-ic.com/datasheet/index.mvp/id/5452). Didn’t know about the existence of these ICs until recently but they are definitely the most convenient help one can get in making a software defined radio.
Having your whole front-end on one IC has to be the best thing since sliced bread. The only things necessary (save for the supporting circuitry on the side and any baluns) would be to connect the baseband inputs and outputs to your DSP/FPGA (depending on your design).
So, completed the thesis writing last week. Final page count is 204, that should curb any OCD compulsions.
Now it’s onto the project. Been browsing for a proper bench PSU and multimeter since I decided that I will definitely make use of them extensively in the future as I don’t plan on giving up electronics any time soon. Still though, going to be a R4.5k knock but in this case it’s more of an investment. Can’t go wrong with a Fluke
Sitting here, looking at the page count, 194! Finally! Just need to add references and other non-content additions. Should be 200 pages afterwards, if not, I will make sure it is!
And then it’s time to continue on The Project! Too excited and anxious.
So, been a while. Still working hard on thesis. Deadline has now been officially set by my supervisor as the end of May (i.e. this month!). Fortunately I’m on 171 pages, still a good 30 to go.
As for the personal project, it’s going to be the first thing after this thesis. Prototype and design should be fun and challenging, can’t wait!
So, have been writing the thesis like mad though not making the progress I would’ve liked to. Currently sitting on 83 pages, need 200 by the end of this month. Full-hermit mode: on.
So, been a while since my last update (15 days!). The good thing is that it’s properly justifiable with one word: “Thesis”.
Busy writing, working & sleeping. Repeat ad infinitum.
So far have 49 pages down, done with the hardest bits (introduction halfway through the system models). Good thing is, it only gets easier since it gets more mathematical at this stage…
On the Project Loki front, things are looking good. Haven’t worked much on it but I keep thinking about it in the background constantly. Seems better with every thought. First step is still building those SDRs!
And so, it seems that after multitudes of people were knocking on ICASA’s head, they finally decided to extend their licensing deadline. Quite interesting how they tried to play it off as ignorance (as if no one listens to the minister of communications). It may be them trying to play tough and to show that they’re mightier than the DoC or it could just be them not doing the work they’re there to do. Either way, government is never boring here, that’s for sure.
On the other front, just started writing the big one (ala thesis). This will be painful and as such there will most likely be an update starvation. Having to write everything you know is not the most fun of things and it needs attention.
So, as you folks may remember, the DoC extended their deadline for comment on the Draft Policy for 800 MHz and 2.6 GHz regulation. Turns out ICASA didn’t feel like they should do the same. This in effect means the former happened for no reason given how the whole process relies on ICASA following the policy directions stipulated by the DoC. Sometimes I really wonder if they even deserve the term “regulatory body” or whether they should just be renamed to “give-us-money-we’ll-do-what-the-big-players-want-anyways”…
Right, so I’ve been working like hell as always Also have been doing a trading game for fun, I must say, I do find it damn exciting, something that I never thought I would have.
However, the project still continues. Still in the design and planning phase (haven’t really had much time to even think about it these last two weeks) and the challenge currently is to determine whether a dsPIC will be sufficient to run an SDR. Of course, it won’t be able to do a high bandwidth but I think a 100 kHz baseband bandwidth would be sufficient. The top of the line dsPICs can do 70 MIPS, the ones I have… 40. This design therefore might need to be separated into two microcontrollers, 1 for PHY SDR processing and one for the higher levels.
So, I’ve had an amazing idea for a few weeks now. It’s about time a prototype gets made
The major result of this is to get an SDR going with some funky networking algorithms. One might say “why not just buy a USRP” but this will be a custom job where every Watt and every mm2 counts.
Watch this space!