Right, so I’ve been working like hell as always Also have been doing a trading game for fun, I must say, I do find it damn exciting, something that I never thought I would have.

However, the project still continues. Still in the design and planning phase (haven’t really had much time to even think about it these last two weeks) and the challenge currently is to determine whether a dsPIC will be sufficient to run an SDR. Of course, it won’t be able to do a high bandwidth but I think a 100 kHz baseband bandwidth would be sufficient. The top of the line dsPICs can do 70 MIPS, the ones I have… 40. This design therefore might need to be separated into two microcontrollers, 1 for PHY SDR processing and one for the higher levels.

Ideas?